Digital Logic RTL & Verilog Interview Questions

Cracking Digital VLSI Verification Interview: Interview Success

Verilog by Example: A Concise Introduction for FPGA Design

Advanced Chip Design, Practical Examples in Verilog

The UVM Primer: A Step-by-Step Introduction to the Universal Verification Methodology

Programming FPGAs: Getting Started with Verilog

SystemVerilog for Verification: A Guide to Learning the Testbench Language Features

RTL Modeling with SystemVerilog for Simulation and Synthesis: Using SystemVerilog for ASIC and FPGA Design

Vhdl By Example

Logic Design and Verification Using SystemVerilog (Revised)

Cracking the Coding Interview: 189 Programming Questions and Solutions