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Logic Synthesis and Verification Algorithms

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Condition - Very Good
The item shows wear from consistent use, but it remains in good condition and functions properly. Item may arrive with damaged packaging or be repackaged. It may be marked, have identifying markings on it, or have minor cosmetic damage. It may also be missing some parts/accessories or bundled items.

Logic Synthesis and Verification Algorithms
- Used Book in Good Condition
Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. It also serves as a basic reference work in design automation for both professionals and students.
Logic Synthesis and Verification Algorithms is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits). It combines and integrates modern developments in logic synthesis and formal verification with the more traditional matter of Switching and Finite Automata Theory. The book also provides background material on Boolean algebra and discrete mathematics.
A unique feature of this text is the large collection of solved problems.
Throughout the text the algorithms covered are the subject of one or more problems based on the use of available synthesis programs.
Country USA
Brand Springer
Manufacturer Springer
Binding Hardcover
ItemPartNumber bibliography, index
ReleaseDate 1996-06-30
UnitCount 1
EANs 9780792397465

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